Solid State Technology magazine is the longest-running semiconductor magazine and is the most complete source of information for the semiconductor manufacturing industry.

Solid State Technology is the most complete source of information for wafer fab engineers, operators, and managers; tools and materials suppliers; and semi-conductor researchers.

It provides information on the latest process, equipment and materials technologies for semiconductor and thin-film device and microstructure manufacturing.

Topic Centers include Device Architecture, Facilities, Lithography, Materials, Inspection, Subsystems, Industry News and Wafer Processing.

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View the Digital Issue: Solid State Technology, November 2010

FEATURES
ATOMIC LAYER DEPOSITION
Atomic layer deposition goes mainstream in 22nm logic technologies
Cost-of-ownership (COO) will be a main driver for ALD equipment selection in cost-sensitive markets; and in foundry or other logic applications, equipment choice is more a mix between COO, turn-around time and process performance considerations. M. Verghese, ASM, Phoenix, AZ USA; J. W. Maes, ASM, Leuven, Belgium; N. Kobayashi, ASM, Tokyo, Japan

REDISTRIBUTION AND FAN OUT
Dielectric materials evolve to meet the challenges of wafer level packaging
New polymers that are capable of buff ering die structures from the package stresses will be required of advanced packaging; and materials will continue to evolve to meet the new requirements. Toshiaki Itabashi, DuPont Semiconductor Fabrication Materials, Kanagawa, Japan

ADVANCED SUBSTRATES
Planar fully depleted SOI: the technological solution against variability
FDSOI technology exhibits outstanding variability results, thanks to the use of an undoped channel, and to the good control of silicon fi lm thickness already reached today on commercial SOI wafers. F. Andrieu, O. Weber, J. Mazurier, O. Faynot, CEA-Leti, Grenoble, France

CMP
CMP for metal-gate integration in advanced CMOS transistors
The needs of replacement metal gate HKMG process flows for 45nm node and below CMOS manufacturing are now being met with processes using consumables designed specifi cally for these steps. Paul Feeney, CMP Fellow, Cabot Microelectronics Corp., Aurora, Illinois

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Solid State Technology covers semiconductor manufacturing, wafer fabrication, integrated circuits, thin-film microelectronics, flat-panel displays, and microstructure technologies, processes and equipment and more.

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